From 47aa3268242d17b1ad0de6c47d42070fc327f6e6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Frakn=C3=B3i=20Tam=C3=A1s?= <fraknoitamas@gmail.com>
Date: Sat, 5 Jun 2021 00:41:05 +0200
Subject: [PATCH] Fix ready default value

Enable ready after all init
---
 Core/Src/main.c   | 1 +
 minimatrixstm.ioc | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/Core/Src/main.c b/Core/Src/main.c
index 17c7f53..5b9376c 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -101,6 +101,7 @@ int main(void)
   led_buffer_init();
   init_spi_dma();
   LL_SPI_Enable(SPI3);
+  LL_GPIO_SetOutputPin(Ready_GPIO_Port, Ready_Pin);
   /* USER CODE END 2 */
 
   /* Infinite loop */
diff --git a/minimatrixstm.ioc b/minimatrixstm.ioc
index 53c1f66..aaa2467 100644
--- a/minimatrixstm.ioc
+++ b/minimatrixstm.ioc
@@ -225,7 +225,7 @@ Dma.TIM1_UP.3.Mode=DMA_NORMAL
 ProjectManager.FreePins=false
 RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SClocksFreq_Value,LSI_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSourceVirtual,TIM15Freq_Value,TIM16Freq_Value,TIM17Freq_Value,TIM1Freq_Value,TIM2Freq_Value,USART1Freq_Value,VCOOutput2Freq_Value
 Dma.TIM1_UP.3.Direction=DMA_MEMORY_TO_PERIPH
-ProjectManager.AskForMigrate=false
+ProjectManager.AskForMigrate=true
 Mcu.Name=STM32F301K(6-8)Tx
 Dma.SPI3_RX.0.Instance=DMA1_Channel2
 Mcu.Pin26=VP_TIM1_VS_ClockSourceINT
-- 
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